The present invention relates to power management of a computer system and more particularly to power management for a multiprocessor system.
Multiprocessor computer systems include multi-threaded processors in which a single physical processor is segmented into multiple logical processors, and multicore processors in which multiple processor cores are present in a single package or plural packages.
Mobile computers such as notebook personal computers (PCs) typically incorporate certain power management techniques. One such technique is an adaptive technology which provides for changing both the operating voltage and frequency of the processor such that transition to a lower frequency (i.e., performance) point leads to a cubic reduction in power consumption by the processor at the lower frequency point. Current operating systems use this technique so that the processor is placed at an operating frequency that matches the processor utilization. For example if the processor is idle 50% of the time, then the operating system places the processor at a frequency that is 50% of the maximum operating frequency. However, such techniques can have a deleterious effect on multiprocessor systems, as a frequency change on one processor might get applied to other system processors, which may due to their processor utilization desire higher operating frequencies. Thus a need exists to provide power management techniques for multiprocessor systems.